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بیست و نهمین کنفرانس مهندسی برق ایران
Low-Power Subthreshold Level Shifter in 180 nm Process
نویسندگان :
Zahra Ghasemzadeh
1
Mehdi Saberi
2
1- دانشگاه فردوسی مشهد
2- دانشگاه فردوسی مشهد
کلمات کلیدی :
Subthreshold region, voltage level converter, power dissipation
چکیده :
This brief presents a power-efficient voltage level shifter architecture that can operate in the sub-threshold region. To avoid static power dissipation, the proposed structure exploits an auxiliary circuit to charge internal nodes up to VDDH. Moreover, the strength of the pull-down device is increased with the aid of a second auxiliary circuit. Post-layout simulation results of the proposed structure in a 0.18-μm CMOS technology show that at the input low supply voltage of 0.3 V and the high supply voltage of 1.8 V, the level shifter has a propagation delay of 46 ns, static power dissipation of 230 pW, and an energy per transition of 84 fJ for a 1-MHz input signal.
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بیشتر
ثمین همایش، سامانه مدیریت کنفرانس ها و جشنواره ها - نگارش 44.7.2
