کنفرانس مهندسی برق ایران

صفحه اصلی / سی و یکمین کنفرانس بین المللی مهندسی برق

Efficient Full Adders for Approximate Arithmetic Units in the Image Processing Applications

نویسندگان :

Bahram Rashidi¹

1- دانشگاه آیت الله بروجردی

کلمات کلیدی :

Approximate computing

چکیده :

In this paper, the efficient full adders for approximate arithmetic units in image processing applications are presented. The image processing can be implemented in an error-tolerant mode with acceptable accuracy. The arithmetic operations in digital image processing are performed by using adders and multipliers, which are realized based on full adders. Therefore, three area and delay efficient imprecise full adders are formulated by using the approximation in gate level. The structures are implemented by 2-input NAND and 2-input NOR gates to reduce delay and area. The proposed full adders are compared from hardware and accuracy point of view such as gate count, area-delay product (ADP), error rate (ER), mean error distance (MED), and mean relative error distance (MRED). The efficacy of the proposed full adders in image processing applications such as image Blending and image Sharpening is performed using MATLAB. The results show the proposed approximate full adders are comparable in terms of area, delay, and mean structural similarity index metric (MSSIM) with other works.

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بیشتر

ثمین همایش، سامانه مدیریت کنفرانس ها و جشنواره ها - نگارش 42.0.4