کنفرانس مهندسی برق ایران

صفحه اصلی / سی و سومین کنفرانس بین المللی مهندسی برق

A Two Stage Low Power 0.73-4.4 GHz LNA Using Current Reuse and Noise Reduction Techniques

نویسندگان :

Sajjad Shojaei Baghini¹ Seyed-Ali Samareh-TaheriNasab² Samad Sheikhaei³

1- دانشگاه تهران، دانشکده مهندسی برق و کامپیوتر 2- دانشگاه تهران، دانشکده مهندسی برق و کامپیوتر 3- دانشگاه تهران، دانشکده مهندسی برق و کامپیوتر

کلمات کلیدی :

Low Noise Amplifier (LNA)،Current Reuse،Asymmetrical Inductive Peaking،Wideband Input Impedance Matching،CMOS

چکیده :

Abstract—In this paper, a two stage wideband low–noise amplifier (LNA) based on CG–CS topology using current reuse technique is presented. In the first stage, a CS stage via a pMOS– nMOS pair with a resistive feedback is applied to improve the gain. In addition, an on–chip inductor is used asymmetrically along with to resonates with the parasitic capacitors and enhance the input impedance matching. The output of the CG and CS stages are added together in a second stage, where an on– chip inductor is added to increase the bandwidth of the LNA. Furthermore, noise cancelling/reduction condition is established by adjusting the transistors gm values. The proposed LNA is simulated in TSMC 0.18μm CMOS technology. The results show that it has a flat gain with the maximum value of 15.73dB in the frequency range of 0.73 to 4.4GHz, with the noise figure between 3.37 and 4.15dB. This LNA consumes 6.15mW of power from a 1.8V supply excluding the testing buffer.