کنفرانس مهندسی برق ایران

صفحه اصلی / سی و سومین کنفرانس بین المللی مهندسی برق

Design and Implementation of a Flexible CNN Accelerator for Fast Real-Time Object Detection on FPGA

نویسندگان :

Emadodin Sakhaee¹ Mahdi Kalbasi²

1- دانشگاه اصفهان 2- دانشگاه اصفهان

کلمات کلیدی :

Energy efficiency،real-time image processing،convolutional neural networks،hardware accelerator

چکیده :

In edge computing systems with limited resources, such as mobile devices and the Internet of Things, the use of Convolutional Neural Network (CNN) accelerators on FPGA has increasingly expanded. Ultrascale ZYNQ FPGAs offer scalability and flexibility for implementing deep learning-based object detection applications. However, this technology has low performance and limitations in achieving real-time processing. This paper addresses the optimization of the accelerator at the Register Transfer Level (RTL) to increase processing speed using low-power techniques in FPGA implementation. Therefore, a configurable accelerator design for a CNN-based object detection system at the RTL level on FPGA is proposed. We also present RTL optimization techniques that include techniques for disabling unnecessary clock cycles to reduce energy consumption and the use of the Posit number system format to increase calculation accuracy. The proposed system was tested with ResNet-20 and trained with the CIFAR-10 dataset. The weight data used for this test was provided by Tensil. Experimental results show that the proposed design process improves energy consumption, hardware utilization, and computational accuracy by 11%, up to 25%, and 4%, respectively.